The present invention relates to a self-substrate-bias circuit used in a semiconductor apparatus and, more particularly, a constructional improvement of the capacitor section in the self-substrate-bias circuit device.
In the case where a single power source is used with a semiconductor device such as in a MOS (metal oxide semiconductor) integrated circuit, for example, the bias voltage to be applied to the semiconductor substrate is usually provided through the self-substrate-bias circuit arranged on the semiconductor chip. FIG. 1 shows a circuit diagram of such a bias circuit device. Namely, the bias circuit comprises a capacitor 14 whose one electrode plate A is connected to the output terminal of a pulse generator 12, a diode 16 connected between the other electrode plate B of capacitor 14 and a reference potential such as ground potential, for example, and a diode 20 connected between the electrode plate B of capacitor 14 and a semiconductor substrate 18.
FIG. 2 shows roughly a conventional practical circuit arrangement of the circuit device shown in FIG. 1. MOS structural elements enclosed by broken line blocks I, II and III in FIG. 2 are used to form the capacitor 14 and diodes 16 and 20, respectively. To explain the block I of capacitor 14, N.sup.+ regions 21, 22 and N.sup.- region 24 form the electrode plate B of capacitor 14, and a conductive gate film 26 forms the electrode plate A of capacitor 14. Numeral 28 denotes a gate insulation film.
Bias voltage having a magnitude depending upon the amplitude of output pulse of pulse generator 12 and the forward voltage of diodes 16 and 20 is applied to the substrate 18 in the arrangement described above. When potential on the input side of capacitor 14 is high, electrons are supplied to the output side of capacitor 14 from the ground. When potential on the input side changes from high to low, electrons stored on the output side diffuse into the substrate to combine with holes. Namely, that region of substrate 18 which is contacted to the electrode plate B on the output side of capacitor 14, in other words, that region of substrate 18 which is contacted to N.sup.+ regions 21, 22 and N.sup.- region 24 of capacitor 14 in FIG. 2 is a region from which electrons diffuse.
In the case of devices such as dynamic RAM (Random Access Memory) and CCD (Charge Coupled Device) in which potential wells are formed, electrons diffusing, as described above, into the substrate 18 from the bias circuit device formed on the same clip on which these devices are formed can enter into potential wells causing these device to malfunction. When the substrate is intended to have high resistance, the impurity concentration of the substrate becomes low and the diffusing distance of electrons becomes large. Therefore, even if devices such as RAM and CCD are arranged remote from the bias circuit device, devices such as RAM and CCD can be adversely influenced by diffusing electrons. In addition, when the impurity concentration of the substrate becomes low, capacitance between the substrate and ground becomes small causing the self-substrate-bias voltage to be unstable.